Many obstacles exist to further miniaturization of semiconductor components. Among these obstacles include the filling of metal interconnect layers to insure proper operation of the devices. Metal interconnect signal lines establish contact with lower conductive layers of the integrated circuit through vias that are formed in an insulating layer. It is desirable to completely fill the via with the metal that is used to form the interconnect layer so as to ensure optimal operation of the device.
For reasons of its cost, physical properties and availability, aluminum is presently the metal of choice for the fabrication of metal interconnect lines in integrated circuits. The interconnect lines are typically formed by a sputtering process, which can result in less than optimal filling of the contact vias. For example, problems can arise from the accumulation of relatively large amounts of aluminum at the upper surface of the insulating layer. The accumulation of such quantities of aluminum at the edges of the contact via can block or otherwise obstruct the via prior to the delivery of aluminum in sufficient quantity to completely fill the via, resulting in the formation of voids and uneven structures within the via. This problem is particularly acute as integrated circuits are fabricated using smaller geometries.
Finer dimensioned contacts that are to be used in smaller geometry devices, such as future generations of sub-0.5 .mu.m scaled technologies, necessarily will be provided with a larger aspect ratio (i.e., relationship of height to width) than do larger geometry devices, thereby exacerbating the via filling difficulties described above. For example, unduly large voids can result in contact resistance that is appreciably higher than designed. In addition, thinner regions of the aluminum layer adjacent to the via fill region will be subject to electromigration, which can result in the eventual opening of the circuits and failure of the device.
Current tungsten via processing begins with via opening by reactive ion etching (RIE) of an inter-level dielectric (ILD) deposited on appropriately patterned metal leads, such as TiN/Al-Cu/TiN multi-level leads. This is followed by deposition of a Ti/TiN adhesion layer/diffusion barrier, and finally deposition of the tungsten plug. Direct contact of the tungsten plug with the top or bottom aluminum lead can be detrimental to via resistance and electromigration reliability. One theory as to the cause of these problems is possible interaction of aluminum and tungsten, during which the imbalance between aluminum flux and tungsten flux promotes formation of Kirkendal voids. Therefore, it is required that the RIE not attack the TiN cap on Al leads, and that another TiN diffusion barrier be used before tungsten plug deposition to further isolate the aluminum from the tungsten. The drawback of the use of a diffusion barrier in the via is that it blocks diffusion of aluminum and copper at an atomic level from the top metal lead to the bottom lead. As a consequence, there arises a large flux divergence at the via bottom/Al--Cu interface, and therefore poor electromigration performance.
Recent advancements in plug processing indicate that the tungsten plug can be replaced by an aluminum or copper plug deposited by either high temperature/high pressure sputtering or chemical vapor deposition (CVD). Due to their much lower resistance, the deposited aluminum or copper can be used simultaneously as both plugs in vias and conducting leads on the inter-level dielectric field. This eliminates the need of plug etch-back processing, thereby increasing product throughput and yield.
Nevertheless, present aluminum plug processes, which utilize high temperature reflow, high pressure force fill, or CVD, are similar to the tungsten process in that the TiN cap remains intact during reactive ion etch, and a Ti/TiN layer is used as a reflow liner/nucleation seed. Experimental results show the electrical resistance of a 0.45 .mu.m aluminum via to be about 1.2 ohm compared to the approximately 2.2 ohm resistance for a tungsten plug. However, the non-uniformity of the via resistance for the aluminum plug is quite large. In addition, via electromigration tests on aluminum plugs reveal little improvement in lifetime over tungsten plug technology. Accordingly, it would be desirable to develop aluminum and copper plug technology having improved via resistance uniformity and improved electromigration performance over that available in the prior art to more fully utilize the diminished electrical resistance characteristics of aluminum and copper via fill.